Equivalence Checking and Simulation By Computing Range Reduction

In this paper, we introduce new methods of equivalence checking and simulation based on Computing Range Reduction (CRR). Given a combinational circuit N , the CRR problem is to compute the set of outputs that disappear from the range of N if a set of inputs of N is excluded from consideration. Solving equivalence checking by CRR facilitates generation of proofs of equivalence that mimic the “cut propagation” approach used by commercial tools. However, in contrast to existing methods, CRR can arguably be applied to checking equivalence of circuits that have no functionally equivalent internal points. Simulation by CRR is based on the following observation. Suppose that excluding a set of A of inputs of N leads to the range reduction that contains an erroneous output. Then, set A contains at least one input producing this output i.e. N is buggy. Otherwise, the inputs of A can be safely removed from further consideration: if N is buggy, the set of remaining inputs still contains at least one counterexample. Earlier we showed how CRR can be applied to model checking. Adding equivalence checking and simulation to the list of problems that can be handled by CRR, emphasizes the need for developing efficient CRR algorithms. Such algorithms can be built on the basis of the technique that we are working on called partial quantifier elimination.